Field Programmable Gate Array (FPGA): A Tool for Improving Parallel Computations

Abstract

Platform Multicore Processor, Complex Programmable Logic Devices (CPLDs) Application-Specific Integrated Circuit (ASIC), Graphic Processing Unit(GPU), Vector Processor, Massively parallel processor (MPP), and Symmetric Multiprocessor (SMP) have become key components for dealing with parallel applications. Within parallel computing, there is a specialized parallel device called Field Programmable Array (FPGA) remain niche areas of interest. While not domain-specific, it tends to be applicable to only a few classes of parallel problems. This research work explores the underlying parallel architecture of this Field Programmable Gate Array (FPGA). The design methodology, the design tools for implementing FPGAs is discussed e.g. System Generator from Xilinx, Impulse C programming model etc. FPGA design in compares with other technology) is envisaged. In this research work FPGA typically exploits parallelism because FPGA is a parallel device. With the use of simulation tool, Impulse Codeveloper (Impulse C), FPGA platform graphical tools that provide initial estimates of algorithm throughput such as loop latencies and pipeline effective rates are generated. Using such tools, you can interactively change optimization options or iteratively modify and recompile C code to obtain higher performance.