1. FUTMinna Institutional Repository
  2. Undergraduate Projects
  3. SCHOOL OF ELECTRICAL AND ENGINEERING TECHNOLOGY (SEET)
  4. Computer Engineering
Please use this identifier to cite or link to this item: http://repository.futminna.edu.ng:8080/jspui/handle/123456789/23432
Full metadata record
DC FieldValueLanguage
dc.contributor.authorSUNDAY, KELECHI VINCENT-
dc.date.accessioned2023-12-18T16:31:26Z-
dc.date.available2023-12-18T16:31:26Z-
dc.date.issued2010-11-
dc.identifier.urihttp://repository.futminna.edu.ng:8080/jspui/handle/123456789/23432-
dc.language.isoenen_US
dc.titleTRANSIENT ANAYLSIS AND MODELLING OF D.C SHUNT GENERATOR WITH INTERPOLESen_US
dc.typeThesisen_US
Appears in Collections:Computer Engineering

Files in This Item:
File Description SizeFormat 
OCRELECTRICAL0007326.pdf17 MBAdobe PDFView/Open
Show simple item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.