A Two-Way Loop Algorithm for Exploiting Instruction-Level Parallelism in Memory System

Abstract

There is ever increasing need for the use of computer memory and processing elements in computations. Multiple and complex instructions processing require to be carried out almost concurrently and in parallel that exhibit interleaves and inherent dependencies. Loop architectures such as unrolling loop architecture do not allow for branch/conditional instructions processing (or execution). Two-Way Loop (TWL) technique exploits instruction-level parallelism (ILP) using TWL algorithm to transform basic block loops to parallel ILP architecture to allow parallel instructions processes and executions. This paper presents TWL for concurrent executions of straight forward and branch/conditional instructions. Further evaluation of TWL algorithm is carried out in this paper.